會員登錄
軟體搜尋
您的位置： 網站首頁 >> 程式軟體光碟 >> Linux系統 >> 商品詳情
商品詳情
|
商品編號：CB21052 碟片數量：1片 銷售價格：200 瀏覽次數：27451 
【轉載TXT文檔】 |
您可能也喜歡：
CB3899--Quest Spotlight On UNIX v2.0.0.99 英文光碟正式版 (革命性的診斷工具，能在你的Unix/Linux系統性能下降之前快速糾正問題)
CB6454--CodeWeavers.CrossOver.Linux.Professional.v6.2.0.Rpm.Linux-DVT(作業系統授權執照情況下就可安裝許許多多的 Windows 應用程式)
CB6387--THE FOUNDRY NUKE V4.7V4 LINUX-XFORCE英文正式版(數碼設計圖像處理與排版工具)
CB19392--Tecplot RS 2010 R2 v2010 1.2.10744 LINUX x64 2.6 油氣體視覺化軟體 英文破解版
CB6799--Fintronic Super Finsim v9.2.9英文正式版(頂級的線性FinSim Verilog模擬器)
商品描述
HDL Works HDL Design Entry EASE v7.4 R4 for Linux and Windows 電路設計軟體 英文破解版
破解說明:安裝完成後，請將光碟 \Crack目錄下的檔案，複製到主程式的
安裝目錄內中，並覆蓋, 即可破解!
軟體簡介:
EASE可提供對VHDL、Verilog、FPGA和ASIC的混合語言等電路設計輸入最佳環境，當完成設
計後，允許使用者自行選擇自己喜歡，由EASE提供獨立的合成與模擬工具。在市場上，EAS
E提供最直覺的設計輸入環境，而且不管是對初學者或進階者，提供HDL設計所需的特性，可
選擇文字方式或圖形方式進行設計，EASE會自動依你選擇的編程語言將圖形轉換成對應的HDL
語言。
英文說明:
EASE offers the best of both worlds with your choice of graphical or
text based HDL entry. You don?t need to be a master of either Verilog
or VHDL. When you're creating a new design, just enter your design using
your mix of graphics and text. EASE automatically generates optimized
HDL code for you in the selected language - VHDL or Verilog. Industry
standard version control environments deal with design and configuration
management enabling multiple users to work simultaneously on one EASE
project.
Features & Benefits
- Graphical design environment with automated generation of hierarchical
VHDL or Verilog code
- Push-button import of legacy Verilog or VHDL designs and extraction of
graphical hierarchy
- Adheres to state of the art Windows look and feel for intuitive operation
- Standards compliant (IEEE-1076-87&93 VHDL and IEEE-1364 Verilog)
- True multi-user design environment and associated version control,
managed by a sophisticated design environment browser
- Integrates smoothly with the industry's most popular simulators and
synthesis tools
- Platform independent database
- Integrated HDL language editor
- Hot error reporting
破解說明:安裝完成後，請將光碟 \Crack目錄下的檔案，複製到主程式的
安裝目錄內中，並覆蓋, 即可破解!
軟體簡介:
EASE可提供對VHDL、Verilog、FPGA和ASIC的混合語言等電路設計輸入最佳環境，當完成設
計後，允許使用者自行選擇自己喜歡，由EASE提供獨立的合成與模擬工具。在市場上，EAS
E提供最直覺的設計輸入環境，而且不管是對初學者或進階者，提供HDL設計所需的特性，可
選擇文字方式或圖形方式進行設計，EASE會自動依你選擇的編程語言將圖形轉換成對應的HDL
語言。
英文說明:
EASE offers the best of both worlds with your choice of graphical or
text based HDL entry. You don?t need to be a master of either Verilog
or VHDL. When you're creating a new design, just enter your design using
your mix of graphics and text. EASE automatically generates optimized
HDL code for you in the selected language - VHDL or Verilog. Industry
standard version control environments deal with design and configuration
management enabling multiple users to work simultaneously on one EASE
project.
Features & Benefits
- Graphical design environment with automated generation of hierarchical
VHDL or Verilog code
- Push-button import of legacy Verilog or VHDL designs and extraction of
graphical hierarchy
- Adheres to state of the art Windows look and feel for intuitive operation
- Standards compliant (IEEE-1076-87&93 VHDL and IEEE-1364 Verilog)
- True multi-user design environment and associated version control,
managed by a sophisticated design environment browser
- Integrates smoothly with the industry's most popular simulators and
synthesis tools
- Platform independent database
- Integrated HDL language editor
- Hot error reporting